Low Power Architecture for Wireless Applications: A Survey

Applications such as mobile devices (cellular phones, PDA, consumer electronics) does require both a very powerful processor(s) as well as low power consumption because of the limited power supply on such a device (batteries). Saving power can be achieved on three different levels. Firs, it could be achieved through low power VLSI technology where the transistors consume less power for switching and maintaining state. Second, it could be achieved on the architecture level by designing processors, memory systems, and instruction set architecture with power saving in mind. Lastly, it could be achieved at the application level by using more efficient algorithms, or by compiling the code to run on either the main processor or some re-configurable logic on or off chip in order to save power. This paper presents a survey of low power processor design concentrating only on the architectural and software/reconfigurable logic only.